VulnerabilityPublished 25 Jul 2026

CVE-2026-64461: Linux kernel · PCI: mediatek: Fix IRQ domain leak when port fails to enable

Source GCVE Database

Not known to be exploited.

Data as of 26 Oct 2026, 17:16 UTC

Severity

Medium

Rated by Threat Radar · No CVSS score from NVD or the CNA

EPSS: 0.1% chance of exploitation in 30 days – higher than 7% of CVEsExploit Prediction Scoring System: the likelihood attackers will use this flaw soon.

Exploitation evidence

Disclosed: evidence found.
CVE published 25 Jul 2026
Detectable: no evidence on record.
No public nuclei template indexed
Weaponised: no evidence on record.
No public exploit code indexed in Metasploit or Exploit-DB
Exploited in the wildExploited: no evidence on record.
Not in CISA KEV and no source reports exploitation
Observed by OffSeq MirageSeen by Mirage: no evidence on record.
No attack traffic recorded by OffSeq Mirage sensors

A missing step is not evidence of safety. Sources: cve.org (opens in a new tab), the Metasploit, Exploit-DB and nuclei-templates index as of 26 Oct 2026.

Disclosed: The CVE record is public on cve.org. Its publication is t = 0.
Detectable: A public nuclei template can find exposed instances, for defenders and attackers alike.
Weaponised: Public exploit code exists in Metasploit or Exploit-DB, or CISA SSVC or the CVSS exploit maturity reports a public proof of concept.
Exploited in the wild: CISA KEV lists it, CISA SSVC rates exploitation active, or a source reports attacks.
Observed by OffSeq Mirage: OffSeq Mirage honeypot sensors recorded attack traffic for this CVE, or found exposed hosts without attack traffic.

Moments are spaced evenly, not to scale; a dashed line marks a gap of six months or more. Deltas count from t = 0. Sources that give only a date (CISA KEV, Exploit-DB, or a time of exactly 00:00Z) read “same day” rather than hours. Metasploit modules carry the flaw’s disclosure date, not their release date, and nuclei templates carry no date, so both appear above but not on the timeline.

ghsa-7rvv-9qxr-rh4x

What to do

AI-suggested

A fix has been implemented in the Linux kernel to address this issue by properly freeing IRQ domains on failure of port enabling. Users should update to a Linux kernel version that includes this fix. Since this is a kernel-level resource management fix, applying the official kernel patch or upgrading to a fixed kernel version is the recommended remediation.

Description

In the Linux kernel, the following vulnerability has been resolved: PCI: mediatek: Fix IRQ domain leak when port fails to enable When mtk_pcie_enable_port() fails, mtk_pcie_port_free() removes the port from pcie->ports and frees the port structure. However, the IRQ domains set up earlier by mtk_pcie_init_irq_domain() are never freed. Fix this by refactoring mtk_pcie_irq_teardown() into a per-port helper, mtk_pcie_irq_teardown_port(), and calling it from mtk_pcie_setup() when mtk_pcie_enable_port() fails. Since the IRQ teardown must only happen in the probe error path (during resume, child devices may have active MSI mappings and the NOIRQ context prohibits sleeping locks), mtk_pcie_enable_port() is changed to return an error code so callers can distinguish the two paths and act accordingly. This issue was reported by Sashiko while reviewing the EcoNet EN7528 SoC support series.

Impact

The vulnerability results in a resource leak of IRQ domains when a PCI port fails to enable. While this does not directly lead to code execution or privilege escalation, it can cause resource exhaustion or instability in systems using the affected Mediatek PCI driver. No known exploits are reported in the wild.

Summary

The Linux kernel Mediatek PCI driver had a resource leak vulnerability (CVE-2026-64461) where IRQ domains allocated during PCI port initialization were not freed if mtk_pcie_enable_port() failed. The cleanup function mtk_pcie_irq_teardown() was refactored into a per-port helper and called appropriately on failure to free IRQ domains. This fix prevents IRQ domain leaks by ensuring proper teardown during error handling in the PCI port enable process.

References

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