CVE-2026-80576: Linux kernel · drm/amdgpu: reject oversized IBs with per-ring packet limits
Affects Linux kernelSource CVE Database V5
Not known to be exploited · CVSS 8.8 High · fixed in fd37f9dd5b5ab70a46fa7bc76623c0528d602b27 : patch Linux kernel soon.
Data as of 26 Oct 2026, 13:47 UTC
- EPSS
- 0.1% chance of exploitation in 30 days – higher than 1% of CVEsExploit Prediction Scoring System: the likelihood attackers will use this flaw soon.
- CISA SSVC
- Exploitation
- No evidence of active exploitation and no public proof of concept
- Automatable
- Attackers cannot reliably automate steps 1–4 of the kill chain
- Technical impact
- Total control over the software or total information disclosure
CISA SSVC assessment, 2026-10-16.
- Patch
- Available – fixed in fd37f9dd5b5ab70a46fa7bc76623c0528d602b27, 1474f3970d1afd303e12ff14d06808eabb371576, 67a5d905c17a5066b0f6f950da11da93d56d122b +2
CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:C/C:H/I:H/A:HExploitation evidence
Disclosed: evidence found.
CVE published 26 Aug 2026
Detectable: no evidence on record.
No public nuclei template indexed
Weaponised: no evidence on record.
No public exploit code indexed in Metasploit or Exploit-DB
Exploited in the wildExploited: no evidence on record.
Not in CISA KEV and no source reports exploitation
Observed by OffSeq MirageSeen by Mirage: no evidence on record.
No attack traffic recorded by OffSeq Mirage sensors
A missing step is not evidence of safety. Sources: cve.org (opens in a new tab), the Metasploit, Exploit-DB and nuclei-templates index as of 26 Oct 2026.
What to do
Upgrade to a fixed release listed under Affected software.
Affected software
| Product | Affected | Fixed in |
|---|---|---|
| LinuxLinux | Affected
| Fixed in
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| LinuxLinux | Affected
| Fixed in
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| LinuxLinux | Affected
| Fixed in
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| LinuxLinux | Affected
| Fixed in
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| LinuxLinux | Affected
| Fixed in
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| LinuxLinux | Affected
| Fixed in– |
Description
In the Linux kernel, the following vulnerability has been resolved: drm/amdgpu: reject oversized IBs with per-ring packet limits On GFX rings, amdgpu_cs_p2_ib() passed user-supplied ib_bytes through to ib->length_dw without a limit, while ring_emit_ib() encodes length into packet fields. Oversized values can corrupt adjacent control bits and destabilize command submission. Add a per-ring IB packet size limit helper and reject command submissions exceeding the corresponding dword limit before IB allocation. Use the documented 20-bit limit for GFX/compute/SDMA/VPE, and apply the MM fallback limit for other ring types. (cherry picked from commit 7f48fa2cf62e3fa6c9c3870aa74988f773247e52)
References
- git.kernel.org/stable/c/67a5d905c17a5066b0f6f950da11da93d56d122b (opens in a new tab)
- git.kernel.org/stable/c/6e164ba1057175fb8a370d8e05cbff5c57eac0c8 (opens in a new tab)
- git.kernel.org/stable/c/1474f3970d1afd303e12ff14d06808eabb371576 (opens in a new tab)
- git.kernel.org/stable/c/07fe270ec07c138a70afe7a81e115a85c35c545c (opens in a new tab)
- git.kernel.org/stable/c/fd37f9dd5b5ab70a46fa7bc76623c0528d602b27 (opens in a new tab)