CVE-2024-21820: Intel(R) Xeon(R) processor memory controller configurations when using Intel(R) SGX · escalation of privilege
Affects Intel(R) Xeon(R) processor memory controller configurations when using Intel(R) SGXSource CVE Database V5
Not known to be exploited · CVSS 8.5 High.
Data as of 25 Oct 2026, 19:02 UTC
- EPSS
- 0.2% chance of exploitation in 30 days – higher than 11% of CVEsExploit Prediction Scoring System: the likelihood attackers will use this flaw soon.
CVSS:4.0/AV:L/AC:H/AT:P/PR:H/UI:N/VC:H/VI:H/VA:N/SC:H/SI:H/SA:NExploitation evidence
Disclosed: evidence found.
CVE published 13 Nov 2024
Detectable: no evidence on record.
No public nuclei template indexed
Weaponised: no evidence on record.
No public exploit code indexed in Metasploit or Exploit-DB
Exploited in the wildExploited: no evidence on record.
Not in CISA KEV and no source reports exploitation
Observed by OffSeq MirageSeen by Mirage: no evidence on record.
No attack traffic recorded by OffSeq Mirage sensors
A missing step is not evidence of safety. Sources: cve.org (opens in a new tab), the Metasploit, Exploit-DB and nuclei-templates index as of 2026-10-25.
What to do
AI-suggested
1. Monitor Intel's security advisories closely and apply official patches or microcode updates as soon as they become available. 2. Until patches are released, review and harden memory controller configurations related to Intel SGX to ensure permissions are as restrictive as possible. 3. Enforce strict access controls and limit privileged user accounts to minimize the risk of insider threats or privilege misuse. 4. Implement robust auditing and monitoring of privileged user activities to detect suspicious behavior early. 5. Use hardware-based attestation and integrity verification features of SGX to detect unauthorized changes. 6. Consider disabling Intel SGX in environments where it is not essential, reducing the attack surface. 7. For cloud providers, isolate workloads and enforce tenant separation rigorously to limit potential cross-tenant impact. 8. Conduct regular security assessments and penetration testing focusing on privilege escalation vectors within server environments. 9. Educate system administrators about the risks and ensure they follow best practices for secure configuration management. 10. Maintain an incident response plan that includes scenarios involving privilege escalation vulnerabilities.
Description
Incorrect default permissions in some Intel(R) Xeon(R) processor memory controller configurations when using Intel(R) SGX may allow a privileged user to potentially enable escalation of privilege via local access.