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VulnerabilityPublished Updated

CVE-2024-36347: AMD EPYC™ 7001 Series · Improper Verification of Cryptographic Signature

Affects AMD EPYC™ 7001 SeriesSource CVE Database V5

0

Not known to be exploited · CVSS 6.4 Medium.

Data as of 26 Oct 2026, 14:05 UTC

CVSS 3.1 base score
6.4Medium
How severe the flaw is on the 0–10 CVSS scale.
EPSS
0.1% chance of exploitation in 30 days – higher than 1% of CVEsExploit Prediction Scoring System: the likelihood attackers will use this flaw soon.
CVSS:3.1/AV:L/AC:H/PR:H/UI:N/S:U/C:H/I:H/A:H

Exploitation evidence

  1. Disclosed: evidence found.

    CVE published 27 Jun 2025

  2. Detectable: no evidence on record.

    No public nuclei template indexed

  3. Weaponised: no evidence on record.

    No public exploit code indexed in Metasploit or Exploit-DB

  4. Exploited in the wild: no evidence on record.

    Not in CISA KEV and no source reports exploitation

  5. Observed by OffSeq Mirage: no evidence on record.

    No attack traffic recorded by OffSeq Mirage sensors

A missing step is not evidence of safety. Sources: cve.org (opens in a new tab), the Metasploit, Exploit-DB and nuclei-templates index as of 26 Oct 2026.

What to do

AI-suggested

To mitigate this vulnerability, organizations should: 1) Apply official AMD microcode updates and firmware patches as soon as they become available to ensure proper signature verification is enforced. 2) Restrict and monitor local administrative access rigorously to prevent unauthorized users from gaining the high privileges needed to exploit this flaw. 3) Implement strong endpoint security controls and privilege management to reduce the risk of privilege escalation to administrator level. 4) Employ hardware-based security features such as Trusted Platform Module (TPM) and secure boot mechanisms to detect unauthorized microcode changes. 5) Monitor system logs and firmware update activities for anomalies indicative of malicious microcode loading attempts. 6) Use intrusion detection and prevention systems tailored to detect unusual CPU behavior or firmware tampering. 7) Maintain a robust incident response plan that includes firmware-level compromise scenarios. 8) Engage with AMD and hardware vendors for timely security advisories and updates. These steps go beyond generic advice by focusing on controlling local admin access, monitoring microcode update processes, and leveraging hardware security features to detect and prevent exploitation.

Description

Improper signature verification in AMD CPU ROM microcode patch loader may allow an attacker with local administrator privilege to load malicious microcode, potentially resulting in loss of integrity of x86 instruction execution, loss of confidentiality and integrity of data in x86 CPU privileged context and compromise of SMM execution environment.

References

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