CVE-2024-36350VulnerabilityPublished 8 Jul 2025Updated 4 Nov 2025

CVE-2024-36350: AMD EPYC™ 7003 Series Processors · Exposure of Sensitive Information in Shared Microarchitectural Structures during Transient Execution

Affects AMD EPYC™ 7003 Series ProcessorsSource CVE Database V5

Not known to be exploited · CVSS 5.6 Medium.

Data as of 25 Oct 2026, 19:02 UTC

CVSS 3.1 base score

5.6Medium

How severe the flaw is on the 0–10 CVSS scale.

EPSS: 0.4% chance of exploitation in 30 days – higher than 42% of CVEsExploit Prediction Scoring System: the likelihood attackers will use this flaw soon.

CVSS:3.1/AV:L/AC:H/PR:L/UI:N/S:C/C:H/I:N/A:N

Attack Vector: Local
Attack Complexity: High
Privileges Required: Low
User Interaction: None
Scope: Changed
Confidentiality: High
Integrity: None
Availability: None

Bold values are the worst case: easiest to exploit or largest impact.

Attack Vector: Local: The vulnerable component is not bound to the network stack and the attacker’s path is via read/write/execute capabilities. Either: the attacker exploits the vulnerability by accessing the target system locally (e.g., keyboard, console), or remotely (e.g., SSH); or the attacker relies on User Interaction by another person to perform actions required to exploit the vulnerability (e.g., tricking a legitimate user into opening a malicious document).
Attack Complexity: High: A successful attack depends on conditions beyond the attacker's control. That is, a successful attack cannot be accomplished at will, but requires the attacker to invest in some measurable amount of effort in preparation or execution against the vulnerable component before a successful attack can be expected. For example, a successful attack may require an attacker to: gather knowledge about the environment in which the vulnerable target/component exists; prepare the target environment to improve exploit reliability; or inject themselves into the logical network path between the target and the resource requested by the victim in order to read and/or modify network communications (e.g., a man in the middle attack).
Privileges Required: Low: The attacker is authorized with (i.e., requires) privileges that provide basic user capabilities that could normally affect only settings and files owned by a user. Alternatively, an attacker with Low privileges may have the ability to cause an impact only to non-sensitive resources.
User Interaction: None: The vulnerable system can be exploited without any interaction from any user.
Scope: Changed: An exploited vulnerability can affect resources beyond the security scope managed by the security authority of the vulnerable component. In this case, the vulnerable component and the impacted component are different and managed by different security authorities.
Confidentiality: High: There is total loss of confidentiality, resulting in all resources within the impacted component being divulged to the attacker. Alternatively, access to only some restricted information is obtained, but the disclosed information presents a direct, serious impact.
Integrity: None: There is no loss of integrity within the impacted component.
Availability: None: There is no impact to availability within the impacted component.

Definitions: FIRST CVSS v3.1 specification.

Exploitation evidence

Disclosed: evidence found.
CVE published 8 Jul 2025
Detectable: no evidence on record.
No public nuclei template indexed
Weaponised: no evidence on record.
No public exploit code indexed in Metasploit or Exploit-DB
Exploited in the wildExploited: no evidence on record.
Not in CISA KEV and no source reports exploitation
Observed by OffSeq MirageSeen by Mirage: no evidence on record.
No attack traffic recorded by OffSeq Mirage sensors

A missing step is not evidence of safety. Sources: cve.org (opens in a new tab), the Metasploit, Exploit-DB and nuclei-templates index as of 2026-10-25.

Disclosed: The CVE record is public on cve.org. Its publication is t = 0.
Detectable: A public nuclei template can find exposed instances, for defenders and attackers alike.
Weaponised: Public exploit code exists in Metasploit or Exploit-DB, or CISA SSVC reports a public proof of concept.
Exploited in the wild: CISA KEV lists it, CISA SSVC rates exploitation active, or a source reports attacks.
Observed by OffSeq Mirage: OffSeq Mirage honeypot sensors recorded attack traffic for this CVE, or found exposed hosts without attack traffic.

Moments are spaced evenly, not to scale; a dashed line marks a gap of six months or more. Deltas count from t = 0. Sources that give only a date (CISA KEV, Exploit-DB, or a time of exactly 00:00Z) read “same day” rather than hours. Metasploit modules carry the flaw’s disclosure date, not their release date, and nuclei templates carry no date, so both appear above but not on the timeline.

What to do

AI-suggested

1. Monitor AMD’s security advisories closely for the release of microcode or firmware updates addressing CVE-2024-36350 and apply them promptly. 2. Restrict local access to systems running AMD EPYC 7003 processors by enforcing strict access controls, network segmentation, and least privilege principles to reduce the attack surface. 3. In virtualized or cloud environments, isolate workloads and tenants to minimize the risk of cross-VM data leakage. 4. Employ runtime monitoring and anomaly detection to identify suspicious local activities that could indicate exploitation attempts. 5. Review and harden system configurations to limit the ability of low-privilege users to execute code or perform timing attacks. 6. Consider disabling or limiting features that enable speculative execution if supported by the platform and if performance impact is acceptable. 7. Educate system administrators and security teams about the nature of transient execution attacks to improve detection and response capabilities. 8. Incorporate this vulnerability into risk assessments and incident response plans to ensure preparedness. 9. Evaluate the use of hardware-based security features such as AMD’s Secure Encrypted Virtualization (SEV) to add layers of protection against data leakage.

Description

A transient execution vulnerability in some AMD processors may allow an attacker to infer data from previous stores, potentially resulting in the leakage of privileged information.

Impact

For European organizations, particularly those operating data centers, cloud services, or critical infrastructure using AMD EPYC 7003 processors, this vulnerability poses a confidentiality risk. Attackers with local access—such as malicious insiders, compromised virtual machines, or attackers exploiting other vulnerabilities to gain local code execution—could potentially extract sensitive information from privileged contexts. This risk is heightened in multi-tenant cloud environments common in Europe, where data leakage between tenants could violate data protection regulations such as GDPR. Although the vulnerability does not affect integrity or availability, the exposure of sensitive data could lead to further attacks, intellectual property theft, or compliance violations. Organizations relying heavily on AMD EPYC 7003 CPUs for server workloads in sectors like finance, government, healthcare, and telecommunications may face increased risk. The absence of known exploits reduces immediate threat but does not eliminate the need for proactive mitigation. The medium severity score suggests a moderate but non-trivial impact, emphasizing the importance of timely patching and access controls.

CWE-1421Exposure of Sensitive Information in Shared Microarchitectural Structures during Transient Execution (opens in a new tab)
Base weakness
A processor event may allow transient operations to access architecturally restricted data (for example, in another address space) in a shared microarchitectural structure (for example, a CPU cache), potentially exposing the data over a covert channel.
Architecture and Design
Hardware designers may choose to engineer the processor's pipeline to prevent architecturally restricted data from being used by operations that can execute transiently.
Architecture and Design
Hardware designers may choose not to share microarchitectural resources that can contain sensitive data, such as fill buffers and store buffers.
Architecture and Design
Hardware designers may choose to sanitize specific microarchitectural state (for example, store buffers) when the processor transitions to a different context, such as whenever a system call is invoked.
From MITRE CWE, MITRE CAPEC and OWASP (Top 10, OpenCRE).

References

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Exploitation evidence

What to do

Description

AI analysisMachine-generated, updated 10 Nov 2025, 18:17 UTC

WeaknessesCWE-1421

Technical details

References

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