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VulnerabilityPublished Updated

CVE-2025-32086: Intel(R) Xeon(R) 6 Processors when using Intel(R) SGX or Intel(R) TDX · Escalation of Privilege

Affects Intel(R) Xeon(R) 6 Processors when using Intel(R) SGX or Intel(R) TDXSource CVE Database V5

0

Not known to be exploited · CVSS 4.5 Medium.

Data as of 26 Oct 2026, 14:05 UTC

CVSS 4.0 base score
4.5Medium
How severe the flaw is on the 0–10 CVSS scale.
EPSS
0.1% chance of exploitation in 30 days – higher than 3% of CVEsExploit Prediction Scoring System: the likelihood attackers will use this flaw soon.
CVSS:4.0/AV:L/AC:H/AT:N/PR:H/UI:N/VC:N/VI:N/VA:N/SC:H/SI:H/SA:N

Exploitation evidence

  1. Disclosed: evidence found.

    CVE published 12 Aug 2025

  2. Detectable: no evidence on record.

    No public nuclei template indexed

  3. Weaponised: no evidence on record.

    No public exploit code indexed in Metasploit or Exploit-DB

  4. Exploited in the wild: no evidence on record.

    Not in CISA KEV and no source reports exploitation

  5. Observed by OffSeq Mirage: no evidence on record.

    No attack traffic recorded by OffSeq Mirage sensors

A missing step is not evidence of safety. Sources: cve.org (opens in a new tab), the Metasploit, Exploit-DB and nuclei-templates index as of 26 Oct 2026.

What to do

AI-suggested

  1. Monitor Intel’s official security advisories and apply firmware or microcode updates as soon as patches for CVE-2025-32086 become available.
  2. Restrict and tightly control privileged local access to systems running affected Intel Xeon 6 processors with SGX or TDX enabled. Implement strict access controls and auditing to detect unauthorized privilege escalations.
  3. Employ hardware attestation and runtime integrity monitoring tools to detect anomalies within SGX or TDX enclaves.
  4. For cloud providers, isolate workloads and enforce strict tenant separation to minimize risk from privileged user compromise.
  5. Conduct regular security reviews of hardware-based security configurations, including DDRIO settings, to ensure compliance with best practices.
  6. Consider disabling SGX or TDX features temporarily if immediate patching is not possible and the risk of local privilege escalation is unacceptable.
  7. Educate system administrators and security teams about the vulnerability and the importance of limiting privileged local access.
  8. Integrate this vulnerability into risk assessments and incident response plans to prepare for potential exploitation scenarios.

Description

Improperly implemented security check for standard in the DDRIO configuration for some Intel(R) Xeon(R) 6 Processors when using Intel(R) SGX or Intel(R) TDX may allow a privileged user to potentially enable escalation of privilege via local access.

References

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