CVE-2025-52534: AMD EPYC™ 9005 Series Processors · Improper Validation of Specified Quantity in Input
Affects AMD EPYC™ 9005 Series ProcessorsSource CVE Database V5
Not known to be exploited · CVSS 5.3 Medium.
Data as of 26 Oct 2026, 12:55 UTC
- EPSS
- 0.3% chance of exploitation in 30 days – higher than 27% of CVEsExploit Prediction Scoring System: the likelihood attackers will use this flaw soon.
CVSS:4.0/AV:N/AC:L/AT:N/PR:L/UI:N/VC:N/VI:L/VA:N/SC:N/SI:L/SA:NExploitation evidence
Disclosed: evidence found.
CVE published 10 Feb 2026
Detectable: no evidence on record.
No public nuclei template indexed
Weaponised: no evidence on record.
No public exploit code indexed in Metasploit or Exploit-DB
Exploited in the wildExploited: no evidence on record.
Not in CISA KEV and no source reports exploitation
Observed by OffSeq MirageSeen by Mirage: no evidence on record.
No attack traffic recorded by OffSeq Mirage sensors
A missing step is not evidence of safety. Sources: cve.org (opens in a new tab), the Metasploit, Exploit-DB and nuclei-templates index as of 26 Oct 2026.
What to do
Affected software
| Product | Affected | Fixed in |
|---|---|---|
| AMDAMD EPYC™ 9005 Series Processors | Affected– | Fixed in– |
AI-suggested
European organizations should prioritize obtaining and applying AMD microcode updates as soon as they become available to address this vulnerability. Until patches are released, organizations should enforce strict isolation policies between guest VMs and the host, including minimizing the attack surface by disabling unnecessary virtualization features and restricting guest privileges. Employing runtime integrity monitoring and anomaly detection on host memory can help identify suspicious activity indicative of exploitation attempts. Cloud providers should consider workload placement strategies that avoid co-locating untrusted guests on the same physical hardware. Additionally, organizations should review and harden hypervisor configurations, apply the principle of least privilege, and maintain up-to-date security monitoring and incident response capabilities. Collaboration with AMD and hardware vendors for timely vulnerability intelligence and patch deployment is essential. Finally, conducting penetration testing and red team exercises simulating this attack vector can improve preparedness.
Description
Improper bound check within AMD CPU microcode can allow a malicious guest to write to host memory, potentially resulting in loss of integrity.