CVE-2025-0007: AMD Xilinx Run Time (XRT) · Improper Adherence to Coding Standards
Affects AMD Xilinx Run Time (XRT)Source CVE Database V5
Not known to be exploited · CVSS 5.7 Medium.
Data as of 26 Oct 2026, 07:57 UTC
- EPSS
- 0.1% chance of exploitation in 30 days – higher than 1% of CVEsExploit Prediction Scoring System: the likelihood attackers will use this flaw soon.
CVSS:3.1/AV:L/AC:L/PR:L/UI:R/S:C/C:L/I:L/A:LExploitation evidence
Disclosed: evidence found.
CVE published 24 Nov 2025
Detectable: no evidence on record.
No public nuclei template indexed
Weaponised: no evidence on record.
No public exploit code indexed in Metasploit or Exploit-DB
Exploited in the wildExploited: no evidence on record.
Not in CISA KEV and no source reports exploitation
Observed by OffSeq MirageSeen by Mirage: no evidence on record.
No attack traffic recorded by OffSeq Mirage sensors
A missing step is not evidence of safety. Sources: cve.org (opens in a new tab), the Metasploit, Exploit-DB and nuclei-templates index as of 2026-10-26.
What to do
AI-suggested
1. Monitor AMD and Xilinx official channels for patches or updates addressing CVE-2025-0007 and apply them immediately upon release. 2. Restrict local user permissions to the minimum necessary, especially on systems running XRT, to reduce the risk of privilege escalation. 3. Implement strict access controls and audit logging for local user activities to detect suspicious behavior indicative of exploitation attempts. 4. Employ endpoint detection and response (EDR) solutions capable of identifying unusual kernel-level activity or privilege escalation patterns. 5. Conduct regular security reviews and code audits of custom integrations with XRT to ensure adherence to secure coding standards. 6. Isolate critical systems using XRT in segmented network zones to limit lateral movement in case of compromise. 7. Provide security awareness training to users with local access to emphasize the risks of social engineering or inadvertent execution of malicious code. 8. Consider deploying host-based intrusion prevention systems (HIPS) to block unauthorized kernel-level modifications. 9. Maintain up-to-date backups and incident response plans tailored to potential privilege escalation scenarios involving XRT. 10. Collaborate with AMD support for guidance on best practices and vulnerability management related to XRT deployments.
Description
Insufficient validation within Xilinx Run Time framework could allow a local attacker to escalate privileges from user space to kernel space, potentially compromising confidentiality, integrity, and/or availability.