CVE-2025-0012VulnerabilityPublished 10 Feb 2026

CVE-2025-0012: AMD EPYC™ 9005 Series Processors · Improper Handling of Overlap Between Protected Memory Ranges

Affects AMD EPYC™ 9005 Series ProcessorsSource CVE Database V5

Not known to be exploited · CVSS 6.8 Medium.

Data as of 25 Oct 2026, 19:02 UTC

CVSS 4.0 base score

6.8Medium

How severe the flaw is on the 0–10 CVSS scale.

EPSS: 0.1% chance of exploitation in 30 days – higher than 4% of CVEsExploit Prediction Scoring System: the likelihood attackers will use this flaw soon.

CVSS:4.0/AV:L/AC:L/AT:N/PR:H/UI:N/VC:L/VI:H/VA:N/SC:N/SI:N/SA:N

Attack Vector: Local
Attack Complexity: Low
Attack Requirements: None
Privileges Required: High
User Interaction: None
Vulnerable system confidentiality: Low
Vulnerable system integrity: High
Vulnerable system availability: None
Subsequent system confidentiality: None
Subsequent system integrity: None
Subsequent system availability: None

Bold values are the worst case: easiest to exploit or largest impact.

Attack Vector: Local: The vulnerable system is not bound to the network stack and the attacker’s path is via read/write/execute capabilities. Either the attacker exploits the vulnerability by accessing the target system locally (e.g., keyboard, console), or through terminal emulation (e.g., SSH); or the attacker relies on User Interaction by another person to perform actions required to exploit the vulnerability (e.g., using social engineering techniques to trick a legitimate user into opening a malicious document).
Attack Complexity: Low: The attacker must take no measurable action to exploit the vulnerability. The attack requires no target-specific circumvention to exploit the vulnerability. An attacker can expect repeatable success against the vulnerable system.
Attack Requirements: None: The successful attack does not depend on the deployment and execution conditions of the vulnerable system. The attacker can expect to be able to reach the vulnerability and execute the exploit under all or most instances of the vulnerability.
Privileges Required: High: The attacker requires privileges that provide significant (e.g., administrative) control over the vulnerable system allowing full access to the vulnerable system’s settings and files.
User Interaction: None: The vulnerable system can be exploited without interaction from any human user, other than the attacker.
Vulnerable system confidentiality: Low: There is some loss of confidentiality. Access to some restricted information is obtained, but the attacker does not have control over what information is obtained, or the amount or kind of loss is limited. The information disclosure does not cause a direct, serious loss to the Vulnerable System.
Vulnerable system integrity: High: There is a total loss of integrity, or a complete loss of protection. For example, the attacker is able to modify any/all files protected by the vulnerable system. Alternatively, only some files can be modified, but malicious modification would present a direct, serious consequence to the vulnerable system.
Vulnerable system availability: None: There is no impact to availability within the Vulnerable System.
Subsequent system confidentiality: None: There is no loss of confidentiality within the Subsequent System or all confidentiality impact is constrained to the Vulnerable System.
Subsequent system integrity: None: There is no loss of integrity within the Subsequent System or all integrity impact is constrained to the Vulnerable System.
Subsequent system availability: None: There is no impact to availability within the Subsequent System or all availability impact is constrained to the Vulnerable System.

Definitions: FIRST CVSS v4.0 specification.

Exploitation evidence

Disclosed: evidence found.
CVE published 10 Feb 2026
Detectable: no evidence on record.
No public nuclei template indexed
Weaponised: no evidence on record.
No public exploit code indexed in Metasploit or Exploit-DB
Exploited in the wildExploited: no evidence on record.
Not in CISA KEV and no source reports exploitation
Observed by OffSeq MirageSeen by Mirage: no evidence on record.
No attack traffic recorded by OffSeq Mirage sensors

A missing step is not evidence of safety. Sources: cve.org (opens in a new tab), the Metasploit, Exploit-DB and nuclei-templates index as of 2026-10-25.

Disclosed: The CVE record is public on cve.org. Its publication is t = 0.
Detectable: A public nuclei template can find exposed instances, for defenders and attackers alike.
Weaponised: Public exploit code exists in Metasploit or Exploit-DB, or CISA SSVC reports a public proof of concept.
Exploited in the wild: CISA KEV lists it, CISA SSVC rates exploitation active, or a source reports attacks.
Observed by OffSeq Mirage: OffSeq Mirage honeypot sensors recorded attack traffic for this CVE, or found exposed hosts without attack traffic.

Moments are spaced evenly, not to scale; a dashed line marks a gap of six months or more. Deltas count from t = 0. Sources that give only a date (CISA KEV, Exploit-DB, or a time of exactly 00:00Z) read “same day” rather than hours. Metasploit modules carry the flaw’s disclosure date, not their release date, and nuclei templates carry no date, so both appear above but not on the timeline.

What to do

Affected software

Product	Affected	Fixed in
AMDAMD EPYC™ 9005 Series Processors	Affected–	Fixed in–
AMDAMD EPYC™ Embedded 9005 Series Processors	Affected–	Fixed in–

AI-suggested

European organizations should implement the following specific mitigations: 1) Restrict and monitor administrative access rigorously to prevent attackers from obtaining the high privileges required to exploit this vulnerability. 2) Employ strict access controls and segmentation to limit the scope of privileged accounts and reduce insider threat risks. 3) Monitor system logs and firmware integrity indicators for anomalies that could suggest attempts to manipulate SMM memory. 4) Engage with AMD and hardware vendors to obtain timely firmware updates or microcode patches addressing this vulnerability as soon as they become available. 5) Consider deploying hardware-based security features such as Trusted Platform Modules (TPM) and secure boot mechanisms to detect unauthorized firmware modifications. 6) In cloud or multi-tenant environments, enforce strong tenant isolation and hypervisor security to reduce risk of privilege escalation. 7) Conduct regular security audits and penetration testing focused on privileged access paths and firmware security. 8) Maintain up-to-date incident response plans that include scenarios involving firmware or hardware-level compromise. These targeted actions go beyond generic patching advice and focus on reducing the likelihood of exploitation and detecting attempts early.

Description

Improper handling of overlap between the segmented reverse map table (RMP) and system management mode (SMM) memory could allow a privileged attacker corrupt or partially infer SMM memory resulting in loss of integrity or confidentiality.

Impact

For European organizations, the impact of CVE-2025-0012 could be significant in sectors relying heavily on AMD EPYC 9005 processors, such as cloud service providers, data centers, telecommunications, and critical infrastructure. Successful exploitation could allow attackers with privileged access to compromise the integrity and confidentiality of system management memory, potentially enabling persistent firmware-level attacks or unauthorized disclosure of sensitive system information. This undermines trust in platform security and could facilitate further lateral movement or privilege escalation within affected networks. Although exploitation requires high privileges, insider threats or attackers who have already gained administrative access could leverage this vulnerability to deepen their control and evade detection. The absence of patches increases risk exposure until mitigations or firmware updates are available. Given the strategic importance of secure server infrastructure in European digital economies and critical services, this vulnerability poses a moderate but non-negligible risk to operational continuity and data protection compliance.

CWE-1260Improper Handling of Overlap Between Protected Memory Ranges (opens in a new tab)
Base weakness
The product allows address regions to overlap, which can result in the bypassing of intended memory protection.
Architecture and Design
Ensure that memory regions are isolated as intended and that access control (read/write) policies are used by hardware to protect privileged software.
Implementation
For all of the programmable memory protection regions, the memory protection unit (MPU) design can define a priority scheme.
OWASP Cheat Sheets
Docker Security (opens in a new tab)
Third Party Javascript Management (opens in a new tab)
Virtual Patching (opens in a new tab)
OWASP ASVS 4.0.3
V1.4.4 (opens in a new tab)
V1.4.5 (opens in a new tab)
V1.10.1 (opens in a new tab)
Attack patterns
Infected Memory (opens in a new tab)
Exploitation of Improperly Configured or Implemented Memory Protections (opens in a new tab)
From MITRE CWE, MITRE CAPEC and OWASP (Top 10, OpenCRE).

References

amd.com/en/resources/product-security/bulletin/AMD-SB-3023.html (opens in a new tab)

Community reviews

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Exploitation evidence

What to do

Affected software

Description

AI analysisMachine-generated, updated 10 Feb 2026, 20:06 UTC

WeaknessesCWE-1260

Technical details

References

Community reviews

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