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CVE-2025-62863VulnerabilityPublished Updated

CVE-2025-62863: n/a

Source CVE Database V5

0

Not known to be exploited · CVSS 9.8 Critical · fixed in 5.4.5.1 : patch affected systems as a priority.

Data as of 26 Oct 2026, 08:30 UTC

CVSS 3.1 base score
9.8Critical
How severe the flaw is on the 0–10 CVSS scale.
EPSS
0.3% chance of exploitation in 30 days – higher than 30% of CVEsExploit Prediction Scoring System: the likelihood attackers will use this flaw soon.
Patch
Available – fixed in 5.4.5.1, 4.4.5.2, 3.5.9.3
CVSS:3.1/AV:N/AC:L/PR:N/UI:N/S:U/C:H/I:H/A:H

Exploitation evidence

  1. Disclosed: evidence found.

    CVE published 16 Dec 2025

  2. Detectable: no evidence on record.

    No public nuclei template indexed

  3. Weaponised: no evidence on record.

    No public exploit code indexed in Metasploit or Exploit-DB

  4. Exploited in the wild: no evidence on record.

    Not in CISA KEV and no source reports exploitation

  5. Observed by OffSeq Mirage: no evidence on record.

    No attack traffic recorded by OffSeq Mirage sensors

A missing step is not evidence of safety. Sources: cve.org (opens in a new tab), the Metasploit, Exploit-DB and nuclei-templates index as of 26 Oct 2026.

What to do

AI-suggested

If you cannot patch yet, organizations should restrict access to management interfaces and PCIe device communication channels to trusted networks only. Implement network segmentation to isolate affected devices and reduce exposure. Employ enhanced logging and anomaly detection focused on SMC calls and PCIe driver interactions to identify potential exploitation attempts. Conduct thorough firmware integrity checks and consider deploying runtime firmware protection mechanisms if supported. Coordinate with hardware vendors and cloud providers to confirm the presence of vulnerable firmware versions and remediation timelines. Additionally, review and harden supply chain security to prevent introduction of compromised firmware images. Finally, prepare incident response plans specific to firmware-level compromises to enable rapid containment and recovery.

Description

Ampere AmpereOne AC03 devices before 3.5.9.3, AmpereOne AC04 devices before 4.4.5.2, and AmpereOne M devices before 5.4.5.1 allow an incorrectly formed SMC call to UEFI-MM PCIe driver that could result in an out-of-bounds write within PCIe driver’s S-EL0 address space.

References

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