Skip to main content
CVE-2025-9613VulnerabilityPublished

CVE-2025-9613: PCI Express Integrity and Data Encryption (PCIe IDE) Specification · Incomplete Cleanup

Affects PCI Express Integrity and Data Encryption (PCIe IDE) SpecificationSource CVE Database V5

0

Not known to be exploited · CVSS 6.5 Medium.

Data as of 25 Oct 2026, 19:02 UTC

CVSS 3.1 base score
6.5Medium
How severe the flaw is on the 0–10 CVSS scale.
EPSS
0.2% chance of exploitation in 30 days – higher than 11% of CVEsExploit Prediction Scoring System: the likelihood attackers will use this flaw soon.
CVSS:3.1/AV:N/AC:L/PR:N/UI:N/S:U/C:L/I:L/A:N

Exploitation evidence

  1. Disclosed: evidence found.

    CVE published 9 Dec 2025

  2. Detectable: no evidence on record.

    No public nuclei template indexed

  3. Weaponised: no evidence on record.

    No public exploit code indexed in Metasploit or Exploit-DB

  4. Exploited in the wild: no evidence on record.

    Not in CISA KEV and no source reports exploitation

  5. Observed by OffSeq Mirage: no evidence on record.

    No attack traffic recorded by OffSeq Mirage sensors

A missing step is not evidence of safety. Sources: cve.org (opens in a new tab), the Metasploit, Exploit-DB and nuclei-templates index as of 2026-10-25.

What to do

Affected software

ProductAffectedFixed in
PCI-SIG PCI Express Integrity and Data Encryption (PCIe IDE) SpecificationAffected
  • =0
Fixed in–

AI-suggested

1. Engage with hardware and firmware vendors to obtain patches or updated PCIe IDE specification implementations that address tag reuse and cleanup issues. 2. Conduct a comprehensive inventory of all PCIe-enabled devices within the infrastructure, focusing on those implementing PCIe IDE features. 3. Implement enhanced monitoring of PCIe bus traffic to detect anomalies indicative of tag aliasing or misrouted completions, using specialized hardware or software tools where available. 4. Apply strict access controls to PCIe interfaces, limiting physical and logical access to trusted personnel and systems to reduce the risk of malicious PCIe traffic injection. 5. Where possible, isolate critical PCIe devices in segmented environments to contain potential exploitation impact. 6. Collaborate with PCI-SIG and industry groups for guidance on best practices and updates related to PCIe IDE security. 7. Review and update incident response plans to include scenarios involving PCIe communication compromise. 8. Educate system architects and security teams on the implications of PCIe vulnerabilities to ensure informed risk management decisions.

Description

A vulnerability was discovered in the PCI Express (PCIe) Integrity and Data Encryption (IDE) specification, where insufficient guidance on tag reuse after completion timeouts may allow multiple outstanding Non-Posted Requests to share the same tag. This tag aliasing condition can result in completions being delivered to the wrong security context, potentially compromising data integrity and confidentiality.

References

Community reviews

Loading reviews…